Description
Image processing offload and acceleration
Matrox® FPGA Development Kit (FDK) provides a library of components that enable development of custom field-programmable gate array (FPGA) configurations for the Matrox Rapixo CXP Pro family of frame grabbers, based on Xilinx Kintex® UltraScale™ devices. The Matrox FDK is used in combination with Xilinx Vivado® Design suite to create FPGA configurations that offload and accelerate image processing functions from the host system.
Focus on custom image processing functions
Developers with software backgrounds can use the Vivado High-Level Synthesis (HLS) tool to write custom image processing functions as FPGA design components using the C or C++ languages. With the Matrox FDK for Matrox Rapixo CXP Pro, developers can focus on creating custom FPGA design components vital to their application rather than the peripheral logic.
Quick assembly of FPGA design components
Custom- and ready-made Matrox FPGA design components are graphically combined within the Xilinx Vivado IP Integrator tool to easily create custom FPGA configurations. In addition, Xilinx provides over 50 image-processing functions within their library with their source code. These can be compiled using Vivado HLS into building blocks compatible with the components provided by the Matrox FDK.
Xilinx Vivado HLS
The Vivado HLS tool is designed for software application developers and FPGA designers seeking a more direct path to FPGA hardware. The Vivado HLS compiler is a high-level synthesis tool that lets developers compile C/C++ algorithms directly into optimized logic, ready for use with FPGA devices found on the Matrox Rapixo CXP Pro. The Vivado HLS tools enable highly iterative, software-oriented design methods for quick development of FPGA hardware modules from C/C++ source code. Several example functions are provided with the FDK; those can be used as-is or as a model for creating custom processing units.
Xilinx Vivado IP Integrator
Custom- and ready-made Matrox FPGA design components are graphically combined within the Xilinx Vivado IP Integrator tool to easily create custom FPGA configurations.
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